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STATE END PROSPECTS OF DEVELOPMENT OF EC-1033 COMPUTER SYSTEM


Выпуск No33 от 2010-01-25

На сегодня читателей Рассылка 'Новости Музея истории вычислительной техники в Казани'

STATE END PROSPECTS OF DEVELOPMENT OF EC-1033 COMPUTER SYSTEM
2010-01-25 22:22 noreply@blogger.com (musadmin)



В статье о семинаре по ЕС-1033, проводимого в Индии в 1978 году, было обещано опубликовать тексты докладов на английском языке, в том виде как они были зачитаны в Дели и Бомбее. Здесь первый доклад «Состояние и перспективы развития ЭВМ ЕС-1033».
















STATE END PROSPECTS OF DEVELOPMENT OF EC-1033 COMPUTER SYSTEM


Seminar on “New Third Generation Soviet EC-1033 Computer System & Latest Technological Advancements In Computer Field in The USSR”
In India, December 5-14, 1978, in New Delhi and Bombay

Состояние и перспективы развития ЭВМ ЕС-1033
Доклад на семинаре в Дели и Бомбее, Индия, декабрь 1978 г.
А.У. Ярмухаметов

In the sixties, the СЕМА countries adopted a project of designing and manufacturing a number of compatible computers with different capacities. The implementation of the project permitted design and series production of third generation computers RJAD-1 within the framework of the integrated system of electronic computers. The introduction of a spectrum of electronic computers with a common structure according to a common project allowed significant advantages to be gained namely: concentration of economic and intellectual resources for the development and improvement of software and extended possibilities for co-operation in manufacturing various devices of computing machinery within the bounds of international co-operation.


At the same time, the process of design, manufacture, and operation of "first-wave" computing machines, models EC-1010, EC-1020, EC-1030, EC-1040, and EC-1050 revealed some inherent shortcomings and limitations. With advances of scientific and technological progress when articles depreciate at drastically higher rates, it became apparent that the accomplishment of the objective of providing computing machinery for countries of the Socialist Community involves design and manufacture of entirely new electronic computers that would possess substantially better operational and engineering characteristics.


The analysis of computer users' needs and study of the world market demands and of computer manufacturers' outfits and potentialities allowed formulation of the basic requirements that should be met by a "second-wave" computing machine with an average capacity.


As a result, some specific requirements for the EC-1033 computer were formulated. These are:


(1) The efficiency for solution of scientific and technological problems should range from 150,000 to 220,000 operations per second and for the class of economic problems from 120,000 to 150,000 operations per second.


(2) The integral reliability index must be assured by a MTF of 150 hours or better, maximum recovery period of 30 minutes, and a technical utilization factor of 0.95 or better.


(3) The size and nomenclature of the major electronic equipment should be minimal as compared to world-market electronic computers of the medium class under consideration.


(4) The hardware/program monitor and recovery facilities should maintain a high level of validity of computed data, top accuracy, and a short time it takes to localize troubles.


(5) Maximum reliability should be ensured for quality control of computer assemblies and the computer proper in all phases of manufacture.


(6) The computer must be noninfringing and highly competitive.


The EC-1033 computer was designed and is now manufactured en masse in full compliance with the above-listed requirements.


The EC-1033 computer is essentially a further improvement of the integrated system computer family and is program-compatible with electronic computers of the system.


The high efficiency the EC-1033 computer shows in solution of scientific and engineering problems is assured by a speed of some 200,000 operations per second according to the Gibson estimate, its speed in solution of economic problems being about 150,000 operations per second according to the GPO-UWII estimate.


The computer under discussion is designed for continuous around-the-clock operation that involves repeated switching-off/on within 24 hours.


The versatility of the EC-1033 computer is insured by high efficiency characteristics, a multipurpose set of instructions, a common method for use in connecting a variety of peripherals, and powerful software. The computer is equally effective both in scientific and business applications.


The expandability of the EC-1033 computer is provided for by the availability of one multiplexer and three selector channels to it. The multiplexer channel provides the capability of connecting up to 256 devices and the selector channel, up to 128 devices that satisfy the requirements of the standard interface of electronic computers within the framework of the integrated system. The computer can operate both offline and as part of data processing systems combining several electronic computers and users into a common computing system. It is fitted with direct control facilities that establish links with other electronic computers.


High reliability characteristics are secured by advanced circuit engineering, a small amount of detachable connections, and by high standards of automation of computer manufacture and quality control.


The central processing unit and computer channels employ medium-scale integration (MSI) integrated microcircuits, specific arithmetic and logic units, decoders, multiplexers, definition monitoring circuits, selectors, etc. The fast action internal storage devices of the central processing unit and computer channels are based on semiconductor integrated storage circuits that give high reliability and a fast processing capability. Superefficient storage uses specifically designed integrated circuits oriented to the processor and channel structure. The application of large-scale integration (LSI) microcircuits made it possible to drastically reduce overall dimensions of the equipment. The EC-1033 computer central processing unit is bodily arranged within a common standard mainframe of the computer integrated system, while the multiplexer channel, three selector channels, and the channel processor take a space of 1.16 of the mainframe.


The above novelty permitted a substantial decrease in the total number of detachable connections which are normally responsible for most failures of the electronic equipment.


The localization of any trouble that is likely to occur in the processor is rendered fully automatic. The diagnostic system is actually a specialized service processor. In response to a fault signal, the diagnostic processor interrupts computations, takes over control from the central processing unit, and seeks to retry the instruction. Upon, successful sevenfold retry, computations are resumed. If the trouble persists, the diagnostic system automatically looks for the trouble, localizes it, and indicates the offending unit to the operator. All CPU trouble localization test programs are nested in permanent storage, and the computer diagnostic system does not require any external media (disks or tapes) for the entry of trouble localization test programs. This feature of the EC-1033 computer diagnostic system insures a high reliability thereof and a high speed of the recovery process. The extent of control and its precision are assured by an overall checks of data transfer and' a large number of test points. A total of 284 check sets are available to the central processing unit. Errors are registered by the diagnostic equipment at 79 inputs.


The diagnostic system for the input/output channels is formed by use of a program hardware method owing to specific features of the peripheral equipment.


The recovery of the computing process at a program level is accomplished by a special block of programs complied for the EC-1033 computer and incorporated into the operating system as its integral component.


SYSTEM COMPONENTS AND PERFORMANCE CHARACTERISTICS


The EC-1033 computer can be extended from a minimal set to a multiprocessing system, thus permitting selection of configuration that would suit its purpose as fully as possible and the reduction of the cost/performance relationship to a minimum.


The heart of the system is a processor, type EC-2433, composed of a central processing unit, a multiplexer channel, three selector channels, and a diagnostic processor. The processor is physically arranged in CIS frame 1 along with a system console on the end wall.


Main storage of half a million bytes is furnished in two editions : EC-3207 and EC-3208.


The processor draws power from the EC-1033/C000 supply system also arranged in an individual frame. The EC-1030/0005 distribution boards allow the computer associated devices to be connected into a three-phase 50±1 Hz 380/ 220 V power line. The maximum power requirement of the system set under discussion is 60 KVA. The system peripherals are a high-capacity magnetic tape store, type EC-5012-01 (providing up to 8 tape runs in set of 4 each), along with a control unit, type EC-5517, and a high-capacity magnetic disk store, type EC-5061 (up to 6 disks of 29 M in capacity each in stacks of 3), along with a control unit, type EC-5561. The magnetic disk store is normally connected to the first selector channel and the magnetic tape store, to the second selector channel. The third selector channel is standby and intended for use by the Customer's equipment.


The multiplexer channel allows connection of slower operating input and recording devices, which are card punching input device EC-6012, card punching output device EC-7010, card to-tape input device EC-6022, card-to-tape output device EC-7022, typewriters EC-7017 for use by the operator, and alphanumeric printers EC-7032. Each of the above-listed facilities is delivered in pairs.


Apart from that, incorporated are data preparation facilities, which are keyboard puncher IIA80-2/3M (2 pcs), alphanumeric verifier KA80-2/3M, and punched tape handler EC-9024.


The configuration of the EC-1033 computer is illustrated in Fig. 1.


EC-1033 COMPUTER CONFIGURATION


1. Peripherals
2. Processor
3. Console
4. Central processing unit (CPU)
5. Processor EC-2433
6. Channels
7. Multiplexer channel
8. Selector channel 1
9. Selector channel 2
10. Selector channel 3
11. Main storage EC-3208 (EC-3207)
12. Power frame EC-1033/C000
13. up to 8 magnetic tape stores
14. up to 8 magnetic disk stores


(2) The processor internal structure is made such that several logic circuits can function at a time. The introduction of a few internal buses allows several individual data transfers to be executed concurrently. This duplication of functions made it possible to increase the efficiency of the EC-2433 processor by several times as compared to that of conventional-structure computers (say, types EC-1030, IBM-360/50).


(3) The availability and usage of all-purpose selector and multiplexer channels provide a flexible and efficient system for control of input/ output operations. Channel operations in the EC-2433 processor are executed at the same time with operations of the central processing unit under control of the channel processor that possesses external permanent storage.


(4) Efficient control of data transfers and during performance of operations gives a high confidence as the processor is run. Each data byte at internal data transfers and communication with peripherals is assigned its own check digit.


(5) The new approach to the organization of the diagnostic and recovery system gives a long endurance to the processor and permits a minimum time it takes to look for troubles owing to automation of the trouble localization process.


(6) A capability is provided to connect a high-capacity main storage device to the EC-2433 processor. This feature combined with fast action of the processor allows an effective usage of the CIS operating system with much greater capabilities for control of computer operations.


For many of its good performance characteristics, the EC-1033 computer owes to the bus principle underlying its structure organization.


The bus principle of structure organization permitted full advantage to be taken of microprogramming control. The combination of the bus principle of structure organization with microprogramming control gave the EC-1033 computer processor a high functional capability at a small size, regularly performing linkages, fast action reliability of operation, and ease in maintenance.


The bus principle of structure organization in conjunction with microprogramming and modularity underlies the basic design of fourth generation computers. This trend in development of computer engineering opened up great prospects in the course of EC-2433 processor design.


The machine underwent testing when the major principles of bus structures were tried. It also served as a prototype of fourth generation computing systems.


The basic idea of designing bus structures for computing machinery can briefly be outlined as follows.


The perfect performance is expected of a system, in which each structure component is associated with any one of structure components through a programmable individually dirigible linkage. It is only through the use of this sort of system that you can attain top performance characteristics and apply the fastest possible and economical processing algorithms. However, owing to objective reasons, this task is far from being implemented in practice at the present level of development of microelectronic engineering and technology.


Meanwhile, if you consider data processing operations broken down into a number of discrete instances of time, it will be apparent that a limited number of direct links between the structure components is required at each instant of time as definite class of algorithms is applied. When consideration was given to the arising effect alongside with the microprogramming principles where quantization of data processing is involved, use was made in the EC-1033 computer design of a structure that contained an optimum number of individually dirigible and equivalent buses.


Computing facilities along with the bus organization of structures from a computing medium threaded by several monotypic individually dirigible data buses where each structure module (block/unit or an assembly) is connected by data poles to each data bus.


During execution of algorithms through microprogramming, the structure is adjusted for each operational cycle to form a new configuration. This technological principle allows you to obtain an effect of linking each structure component to any one of other structure components for a specific period of time with a definite limited number of available buses as certain algorithms are being executed.


The application of microprogramming in the central processing unit of the EC-1033 computer, its channels, and diagnostic system enabled a highly flexible control capability ease of tuning up and operating the machine, and higher reliability.


The beneficial factors that allowed development implementation of a variety of new algorithms were the multivalence of interblock/inter-unit links, possibility of adjusting the computer for each operational cycle through the use of a suitable optimum method, and a broad choice of processing facilities.


Practically, the designer is not bound by a tough computer structure as he writes microprograms for devices that feature bus structures. He has set of processing blocks connected to several monotypic data transfer buses available to him. By programming the links between the blocks and interconnecting them over the existing buses, the designer creates a processor structure that perfectly suits the algorithmic operation being executed at the time. At the next operational cycle, as another algorithmic operation is under way, the processor structure is programmed quite differently, and a reconfiguration nicely fitting into this action takes place.


At first glance, it looks like every time a new cycle starts, the microprogram creates a new machine whose block configuration is altered 2.5 million times a second.


By using a bus structure organization as the basis for the EC-1033 computer design, the designers extended the machine's potentialities through creation of a number of units and assemblies that organically fitted into the basic design concept.


One of the basic design principles involves the application of a superfast internal processor storage device for storing computational sub-products. Access to the storage device is made concurrently by six dirigible addresses. Resort to this type of storage allowed the duplication of data processing functions to be largely avoided and a variety of new fast algorithms to be produced.


The local storage device is also built around storing semiconductors so that, for one operational cycle, both the concurrent readout of two different operands and writing of computed data into storage with the automatic setup of the identifier are possible. This technological principle enabled to obtain a register format instruction execution speed of some one million operations per second.


The provision for the EC-1033 computer of an arithmetic unit capable to perform up to 48 different arithmetic and logic operations and operate in both the binary and decimal notations, the introduction of a special set for data generation and organization, as well as the development and application of optimum algorithms were responsible for fairly high economic data processing speeds of up to 150,000 operations per second.


This figure is characteristic of the EG-1050 computer, which is the senior model of the today's computer series. This feature combined with small size and low cost makes the EC-1033 computer the basic model for use in automatic control systems.


The EC-1033 computer is fitted with hardware units for binary-to-decimal conversion and reverse operation. This capability significantly improved the speed of performing these operations and rendered the notational conversion more economical.


The system for monitoring correct execution of operations allows an error to be revealed immediately upon its occurrence in the same operational cycle. This capability of the computer insures high credibility of computed data because the error will not be extended in the course of continued operation, and the raw data will never be lost.


Though the control is extended to cover all data transfer and conversion channels, the total number of monitoring devices is comparatively small because of a specific bus structure employed in the EC-1033 computer. Since data exchanges between any one of the computer units proceeds over common data transfer buses, it is here where the items of monitoring equipment are concentrated. Use is made of several monitoring techniques, each producing the greatest effect in a specific unit. Provision is included for an odd check on the linkage with peripherals and main storage, and for an even check on data exchange inside the processor and channels.


Prediction of check digits for the result and full duplication of the circuitry are adequately introduced. For example, the vital arithmetic/ logic unit is wholly duplicated, and the computed data obtained by the primary and monitor units are subjected to digit-by digit comparison.


Alongside with a number of circuit design and physical arrangement test runs, thorough consideration was given to the introduction of ergonomic and ethic characteristics into the computer under discussion.


An optimum layout of computer installations in the computer room and a nicely looking and comfortable system console are developed. The console was designed in full compliance with the requirements of engineering psychology, work zones were selected and tried for a better effect, a suitable spectrum of matching colors was chosen, and an appropriate finish for display, indicator, and control elements was obtained. A variety of interlocks and fail-safe gadgets were devised and introduced.


It should be noted that means of automation and computing machinery found wide use in the phases of design and manufacture of the EC-1033 computer.


Use was also made of a system for mathematic simulation of operating and maintenance documentation during computer design. An inherent advantage of this system is that it employers a common computer data bank for compiling and formalizing a broad spectrum of documents pertinent to the operation technology, maintenance, and supervision with the aim at obtaining control over automatic gear and rest stations at the manufacturer's.


In effect, all physically completed components of the EC-1033 computer are furnished with technical facilities that aid in making performance conformity checks. This sort of support permits a high quality of produced computers to be maintained.


Many technological approaches and principles used both for design and manufacture of computers are recognized as a novelty in the world's practice and are now patented in a number of both socialist and advanced capitalist countries.


A significant landmark in design, development, and manufacture of the EC-1033 computer was a joint test of the machine undertaken by an international СЕМА team of specialists from Bulgaria, Hungary, Poland, Rumania, the USSR, and Czechoslovakia. The team appreciated high qualities of the computer, uniqueness of applied technological approaches and principles, and its superiority over a similar foreign-made computer version (IBM 360/50). It recommended the EC-1033 computer for use as the basic model of electronic computers within the framework of the Socialist Community's integrated system.


The EC-1033 computer is continually being developed and improved. The complete set of the machine is being expanded through the association of new devices possessing better characteristics. The above-mentioned joint test additionally involved demonstration of alphanumeric displays, type EC-7066, in use with the operating computer as the operator's facility. Tests were made jointly with Bulgarian specialists of magnetic disk stores EC-5061 with a capacity of 29M exceeding the capacity of the EC-5052 magnetic disk store by four times.


Computers along with such stores have already been delivered to the Customer. A Polish-made alphanumeric printer, type EC-7033, was tried as part of the EC-1033 computer installation. There was also introduced a Soviet/ Polish-made main storage device, type EC-3208, that gave good performance.


It is known that for its effectiveness, software largely depends upon the capacity of computer main storage. At present, a computer version with main storage of 1 megabyte in capacity is under development. It is believed that some users will be interested in this computer version.


The above arrangements are aimed at improving the computer quality and satisfying the users' requirements as, fully as possible. A set of arrangements made for development of the EC-1033 computer is expected to eventually turn the machine into a computer installation for use at collective computer centers and in computer network.


To meet this end, it is planned to integrate to the machine and try new higher-capacity magnetic tape stores, type EC-5025, with a writing density of 63 bits/mm and control unit EC-5525, computer graphic facilities — reel — and board-type plotters EC-7052, EC-7053, EC-7051, and a direct operator-to-computer access facility — display EC-7064.


The most promising trend in computer development is the use of a computer on conjunction with teleprocessing facilities. To maintain this trend, it is planned to try operation of inquiry stations AII-61 (EC-8561), AII-63 (EC-8563), and data transfer multiplexer M-2 (EC-8462) associated with the EC-1033 computer.


With advances in development of software for other devices of the integrated system of electronic computers, these will also be included into the prospective plan for association of the equipment with EC-1033 computer.


If computer installations are intended for use as part of real process control networks, the most stringent requirement to be met is to ensure reliability in operation. For this purpose, multi-machine computer installations are being designed. The basis for design of a double-machine computer installation with a common external storage field is formed by the EC-1033 computer.


To conclude, the Customer has already received a total of more than 250 computers EC-1033. So far, the reports that come are only good. The users like the machine, and a great number of orders are placed with the Manufacturer. It is believed that the Indian users will also appreciate the merits of this new computer as it will aid them in developing their national economy at an ever increasing rate.






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